“12.1 Accurate Phase-Level Cross-Platform Power and Performance Estimation”
Xinnian Zheng, LIzy K. John, & Andreas Gerstlauer | Univ. of Texas at Austin, TX

39.1 Distributed On-chip Voltage Regulation: Theoretical Stability Foundation, Over-design Reduction and Performance Optimization
Xin Zhan, Peng Li, & Edgar Sanchez-Sinencio | Texas A&M; Univ., College Station, TX

“2.3 Vt and Size Optimization Considering Dynamic Power and Minimum Width Constraints”
George Gonzalez, Mahesh Sharma | Advanced Micro Devices, Inc., Austin, TX
Erhan Ergin | Advanced Micro Devices, Inc., Sunnyvale, CA
Sabeesh Balagangadharan | Advanced Micro Devices, Inc., Bangalore, India
Tim Puzey, William Keshlear | Advanced Micro Devices, Inc., Austin, TX
Amartya Mazumdar | Advanced Micro Devices, Inc., Bangalore, India
Robert Cole | Advanced Micro Devices, Inc., Boxborough, MA

45.3 A Convergent Pin Optimization Methodology for Hierarchical Design Closure
Shyam Ramji | IBM Systems and Technology Group, Poughkeepsie, NY
Randall J. Darden | IBM Systems and Technology Group, Springfield, MO
Eddy St. Juste, Christopher J. Berry | IBM Systems and Technology Group, Poughkeepsie, NY

“17.1 Accelerating an IoT Application by using FPGA tightly coupled with CPU”
Yuki Kobayashi, Takashi Takenaka, Takeo Hosomi, Yuichi Nakamura | NEC Corp., Kawasaki, Japan

“62.1 Putting On the Dynamic Power Glasses: A FinFET-Aware Approach for Early Realistic Block Activity Analysis and Exploration”
Ioannis Savvidis, Björn Fjellborg | Ericsson, Stockholm, Sweden

11.45 “Many-Core Distributed Platform: The Road to Graceful Hardware”
Nizar Dahir, Pedro B. Campos, Colin Bonney, Martin Trefzer, Andy M. Tyrrell, & Gianluca Tempesti | Univ. of York, United Kingdom

“37.4 Case Study: Right-sized Security for IoT”
Mike Eftimakis | ARM Ltd., Cambridge, United Kingdom