DAC 2017 | Best Paper/Presentation Recipients

“Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs”

Speaker:
Yao-Wen Chang | National Taiwan Univ., Taipei, Taiwan

Authors:
Jianli Chen, Ziran Zhu, Wenxing Zhu | Fuzhou Univ., Fuzhou, China
Yao-Wen Chang | National Taiwan Univ., Taipei, Taiwan

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“Low-Power On-Chip Network Providing Guaranteed Services for Snoopy Coherent and Artificial Neural Network Systems”

Speaker:
Bhavya K. Daya | Massachusetts Institute of Technology & Intel Corp., Hillsboro, OR

Authors:
Bhavya K. Daya | Massachusetts Institute of Technology & Intel Corp., Hillsboro, OR
Li-Shiuan Peh | Massachusetts Institute of Technology & National Univ. of Singapore, Cambridge, MA
Anantha Chandrakasan | Massachusetts Institute of Technology, Cambridge, MA

“Comprehensive Power Rail Constraint Verification for Large Analog Designs at Early Stage”

Speaker:
Shuichi Teramoto | Renesas System Design Co., Ltd., Kodaira-shi, Japan

Authors:
Shuichi Teramoto, Hisato Inaba | Renesas System Design Co., Ltd., Takasaki-shi, Japan
Kunihiro Yanagida | Mentor, A Siemens Business, Shinagawa-ku, Japan

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“An Effective OCV Reduction Methodology for Top-Level Clock Tree Synthesis”

Speaker:
Yih-Chih Chou | Global Unichip Corp., Hsinchu, Taiwan

Authors:
ih-Chih Chou, Cheng-Hong Tsai, Chih-Mou Tseng | Global Unichip Corp., Hsinchu, Taiwan

“Automating Communication of Complex Data in FPGA Accelerated Software Systems”

Speaker:
Adam Sapek | Microsoft Corporation, Redmond, WA

Authors:
Adam Sapek, Andrew Putnam, Daniel Lo, Derek Chiou, Kalin Ovtcharov, Shlomi Alkalay | Microsoft Corporation, Redmond, WA

“End-to-End Formal Verification Method for Communication IP Including S/W”

Speaker:
Fumitaka Fukuzawa | Renesas System Design Co., Ltd., Tokyo, Japan

Authors:
Fumitaka Fukuzawa, Satoshi Kaneko | Renesas System Design Co., Ltd., Tokyo, Japan

“L-IOT: A Flexible Energy Efficient Platform Targeting Wide Range IoT Applications”

Speaker:
Ivan Miro-Panades | CEA-LETI, Grenoble, France

Authors:
Edith Beigne, Ivan Miro-Panades, Jean-Frederic Christmann, Simone Bacles-Min, Arnaud Verdant, Gilles Sicard, Anca Molnos, Suzanne Lesecq, Damien Couroussé, Carolynn Bernier, Clément Jany, Baudouin Martineau, Dominique Morche, Anthony Quelen, Gael Pillonnet, Franck Badets, Alexandre Valentian | CEA-LETI, Grenoble, France

“PCIe TripleCheck: Boosting the Design Confidence”

Speaker:
Devanshu Bajaj | Cadence Design Systems, Inc., Noida, India

Authors:
Devanshu Bajaj | Cadence Design Systems, Inc., Noida, India