Giovanni De Micheli | EPFL, Lausanne, Switzerland

H.S. Philip Wong | Stanford University, California, USA

Ingrid Verbauwhede | KI Leuven, Belgium

Sung Kyu Lim | Georgia Institute of Technology
For contributions to electronic design automation and the tradeoff for 3-dimensional integrated circuits.

Sherief Reda | Brown University
For contributions to energy-efficient and approximate computing.

Zhiru Zhang | Cornell University
For contributions to field-programmable gate array high-level synthesis and accelerator design.

Norman Chang | Ansys, Inc
For leadership in the physical-level sign-off of Electronic Design Automation for SoC/ 3DIC.

Ryan Kastner | University of California-San Diego
For contributions to the design and security of reconfigurable systems.

Evangeline F.Y. Young | The Chinese University of Hong Kong
For contributions to electronic design automation in VLSI physical design.

Moshe Vardi and Pierre Wolper
“An Automata-Theoretic Approach to Automatic Program Verification”, published in the proceedings of the 1st Symposium on Logic in Computer Science,1986.

Ron Rohrer | Southern Methodist University, Carnegie Mellon University

David Atienza | EPFL
For contributions to the design of high-performance integrated systems and ultra-low power edge circuits and architectures.

Jörg Henkel | Karlsruhe Institute of Technology
For contributions to hardware/software co-design of power and thermal efficient embedded computing.

Farinaz Koushanfar | UC San Diego
For contributions to secure computing and privacy-preserving machine learning.

Jianli Chen | Shanghai LEDA Technology Co., Ltd.; Fudan University
Pierre-Emmanuel Gaillardon | University of Utah
Sriram Rajamanohar | Keysight
Yiyu Shi | University of Notre Dame

X. Sharon Hu | University of Notre Dame
This annual award, named for Marie R. Pistilli, the former organizer of DAC, recognizes individuals who have visibly helped advance women in Electronic Design.

Shane Williams | Princeton University

1960s "Sketch pad a man-machine graphical communication system" by Ivan E. Sutherland, 1964.
1970s "A logic design structure for LSI testability" by E.B. Eichelberger, T.W. Williams, 14th DAC, 1977.
1980s "Dagon: technology binding and local optimization by DAG matching” by K. Keutzer, 24th DAC, 1987.
1990s "Symbolic Model Checking Using SAT Procedures Instead of BDDs" by A. Biere, A. Cimatti, E.M. Clarke, M. Fujita, Y. Zhu, 36th DAC, 1999.

A previously published (between 1964 and 2000) DAC paper that has demonstrated substantial academic and/or industrial impact in one or more of DAC’s research topics at the time.

Tulika Mitra | National University of Singapore

Patrick Groeneveld | Stanford University

Tsung-Wei Huang | University of Utah

Zhiyao Xie | Duke University

Advisors: Yiran Chen and Hai Li

Robert Wille | Technical University of Munich
Lei Jiang | Indiana University Bloomington
Hui-Ru Jiang |National Taiwan University
Jeyavijayan (JV) Rajendran‬ | Texas A&M University

Atefeh Sohrabizadeh, Cody (Hao) Yu, Min Gao, and Jason Cong

“AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators.” ACM Trans. Des. Autom. Electron. Syst. 27, 4, Article 32 (February 2022).

Yue Tang | University of Pittsburgh

“EF-Train: Enable Efficient On-device CNN Training on FPGA through Data Reshaping for Online Adaptation or Personalization.” ACM Trans. Des. Autom. Electron. Syst. 27, 5, Article 49 (June 2022) | Additional authors: Xinyi Zhang, Peipei Zhou, and Jingtong Hu

Niansong Zhang, Xiang Chen, and Nachiket Kapre

“RapidLayout: Fast Hard Block Placement of FPGA-optimized Systolic Arrays Using Evolutionary Algorithm,” ACM Transactions on Reconfigurable Technology and Systems, Volume 15, Issue 4, June 2022, Article No.: 38, pp 1–23.

Xiaochen Peng, Shanshi Huang, Hongwu Jiang, Anni Lu, and Shimeng Yu

“DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-Chip Training”

Marco Meuli | STMicrosystems

“Requirement Tracing for Design Flow in Communication Protocols IP”