The beauty of the Design Automation Conference is that it is always the same and never the same. There is no technical conference like it. Every year there is the Technical Program, the Designer Track, IP Track and the Exhibition. And the networking opportunities with customers and colleagues is second to none. But each year is different, and I want to share what I see are the exciting new opportunities with DAC this year.
First DAC will be in Las Vegas and the conference hasn’t been there since 2001 and will definitely draw a larger international crowd to the event. The decision makers, the buyers and the engineering managers all attend from around the world, and my goal is to maximize the opportunities to meet with customers and prospects and inform them of all the cool new technology that Silvaco has. So, I am looking forward to that. Secondly, there are many good locations for holding customer events and meetings. Silvaco, is a founding partner of the don’t-miss-it Stars of IP Party each year and we are looking forward to picking just the right venue for the event. You will hear more about what we decide on in the months ahead.
What do you need to do to have a successful DAC experience? For design engineers, be sure to register and attend the Designer Track Sessions. These are always informative about the latest design challenges and successes.
What about this year’s Technical Program? There has been a complete transformation. What has happened? Machine learning technologies have now come completely to the fore front. I looked at the list of Accepted Papers for the Technical Program and counted the number of papers that mention ML keyword including those three letter acronyms (TLA’s) that our industry loves: neural networks, CNN, DNN, LSTM, adversarial networks, GAN. The number of machine-learning and artificial-intelligent architecture research papers grew by 68%, from 56 submissions in 2018 to 92 in 2019.
What is driving the sudden interest in machine learning at the DAC? We have all heard about the development of autonomous driving and smart applications that see-and-sense to make helpful and useful decisions. But we may have been lulled into complacency about the development of the technologies to achieve everyday AI assistance.
First, Machine Learning hardware is power-intensive and will use up every compute cycle available in an SoC and demand even more power to achieve the levels of performance we want. So, the bright minds around the world are attacking the compute problem with novel algorithms to reduce the compute load for calculating NN coefficients and running the hardware to calculate the pattern matching results. Semiconductor process engineers are looking at new memory architectures such as ReRAM and MRAM that can support local computation of the learning coefficients that are essential to working neural networks. These new architectures save precious power and can accelerate computation orders of magnitude faster than traditional CPU designs.
When did, this transformation happen? In 2015, the video recognition world was taken over by CNN hardware that provided a better result that all previous solutions and without writing software to do the recognition. The hardware learns all by itself. Today the visual recognition capabilities can exceed what humans can achieve. This has practical implications in health care and many other fields.
The other driver is low-power. ML and AI can consume a lot of power, but we want the kind of processing at the Edge of the IoT network, where a local decision can and should be made. Low power design methods, new algorithms that reduce complexity of computation, new kinds of design IP in the latest low-power nanometer process technologies will be presented at the Conference.
Only last year Machine Learning and Artificial Intelligence (ML/AI) was a new addition to the DAC program. This year the ML/AI sessions will again highlight the fundamentals, accomplishments to date, and challenges ahead in ML/AI hardware system design and design automation. And I haven’t mentioned all the interesting papers dealing with Security and Trusted Execution Environments (TEE) in embedded hardware in Automotive applications.
For new exhibitors, here are some quick tips for a great DAC:
- Start planning early. Waiting until the middle of May is not good. The 30-minutes you spend now, every few weeks, will save hours of struggle in May.
- Start reaching out to your prospect and customer contact list six weeks out to ensure that you can get on your decision makers DAC meeting schedule.
- Keep your graphics and messages simple for your exhibit booth. This will make is easier for first-time visitors to understand your value.
- Exhibitors are welcome to submit press releases for posting on the DAC website, please allow two-three days for posting to occur. Please send releases to: Robin@dac.com
- About two weeks before John Cooley of Deepchip.com sends out the request for submissions of what is new at your DAC exhibit this year. Don’t miss this opportunity to market your new capabilities through this free channel. And you get to brag about your great tools’ performance numbers if you have hot new EDA software.
- Get your sleep before coming to DAC… Because all the night-time events after the long day on the show floor are both fun and productive as it is another excellent way to network with colleagues. Did I already mention the Stars of IP party on Tuesday night?
- And finally, if you need help with marketing questions or ideas for the show reach out, to the helpful DAC executive committee and in particular the Publicity Chair, Michelle Clancy of Cayenne Communications. She is always glad to offer advice.
The 56th Design Automation Conference will present the entire semiconductor electronics ecosystem including IP, EDA, and Embedded Systems. And the smartest minds are sharing the very latest developments in AI/ML. It is no surprise the tagline of DAC is From Chips to Systems — Learn Today, Create Tomorrow.