A Pavilion Panel will ponder: Why do a vast majority of EDA firms focus on the declining ASIC and ASSP markets when the FPGA market has exponentially more users and is growing?
According to the Market Trends 2009 report from Research Firm Gartner Dataquest, shortly after the dot com bust, ASIC design starts dropped from roughly 7,000 (in the year 2000) to 3,500 (2001) and continued to decline slowly but steadily to roughly 2500 starts in the year 2008. Gartner has yet to release its latest numbers reflecting the impact the mortgage meltdown/recession had on the ASIC starts. But if history is any indicator of future trends, the numbers won’t be rosy for ASIC starts.
That’s bad news for most folks in the ASIC business of course but it also isn’t great news for the EDA industry, which has traditionally counted ASIC design tools as its most lucrative business. Luckily for these traditional EDA vendors, they also sell tools for other markets, including PCB, IC packaging and analog/custom IC design and layout. Increasingly ASSP design is becoming the main market for EDA tool sales. However, ASSPs struggle from the same cost and complexity issues that ASICs do becoming less feasible to build with every cycle of Moore’s law. If you can buy an ASSP off the shelf and software program it to suit your application, your competitors can do the same.
These are all reasons why the FPGA starts and business is now truly entering a new era of growth and the FPGA industry is this year projected to finally surpass the $3B revenue. Today’s biggest FPGAs have the capacity and performance of today’s mainstream ASICs but none of the manufacturing or DFM headaches. FPGAs also have the added advantage of being both hardware and software reprogrammable, allowing design teams to be creative and differentiate their products, and along the way even make some mistakes without fear of sinking the entire company because of it.
Given the trend of declines in ASICs and ASSPs and the increase in FPGAs, one has to wonder why so many EDA firms continue to spend so much time creating tools for the declining ASIC and ASSP business and so few create tools for the exponentially larger FPGA design community? It’s an especially interesting question when you consider that the number of EDA startups targeting the ASIC and ASSP market has continued to increase while the pace of M&A and the multiples big EDA firms are willing to pay to purchase those startups has declined precipitously.
Thus, on Tuesday, June 15th at DAC, FPGA Journal Editor-in-Chief Kevin Morris will moderate a Pavilion panel of distinguished EDA vendors who will discuss the challenges and opportunities of creating EDA companies and tools for the FPGA market.
In this panel, entitled “Is the FPGA Tool Opportunity an Oasis or a Mirage?,” Morris will be joined by Jacques Benkoski, venture capitalist with US Venture Partners and chairman of Synfora, Inc., Simon Bloch, VP and GM of the design and synthesis division at Mentor, A Siemens Business, and Andrew Dauman, the VP of engineering for Synopsys’ Synplicity Business Group.
Come prepared to share your views about the FPGA market, FPGA tools and to ask these panelist some challenging questions. As a bit of background, I encourage you read a recent post from Morris on his site http://www.fpgajournal.com/fpgajournal/feature_articles/20100427-doa/.
I hope to see you there!