9.1 — Aging-Aware Compiler-Directed VLIW Assignment for GPGPU Architectures
12.4 — An ATE Assisted DFD Technique for Volume Diagnosis of Scan Chains
16.1 — Proactive Circuit Allocation in Multiplane NoCs
18.6 — A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices
24.1 — ABCD-L: Approximating Continuous Linear Systems Using Boolean Models
31.1 — Scalable Vectorless Power Grid Current Integrity Verification
32.4 — Spacer-Is-Dielectric-Compliant Detailed Routing for Self-Aligned Double Patterning Lithography
37.2 — Rapid Exploration of Processing and Design Guidelines to Overcome Carbon Nanotube Variations
5.1 — Using Formal Verification to Replace Mainstream Simulation
5.5 — Automatic Verification of Floating Point Units
6.2 — Design of Optimal Closed Loop Controller and OS Scheduler for Dynamic Energy Management in Heterogeneous Multicore Processors
10.1 — Advanced Model-Based Hotspot Fix Flow for Layout Optimization with Genetic Algorithm
10.2 — Use of Hierarchical Design Methodologies in Global Infrastructure of the POWER7+ Processor
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DAC is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).