Few industries are as primed for radical change in the years ahead as the worldwide automotive market. Advanced driver assistance system (ADAS) features are increasingly common in entry-level/affordable new car models, and today’s high-end vehicles commonly receive over-the-air software updates and feature semi-autonomous driving functionality. Meanwhile, Silicon Valley start-ups and established auto OEMs alike are rushing to deliver the first true “self-driving” cars. Among the most critical technologies driving this revolution are:
However, despite the rapid advancement of these Connected Car technologies, the era of autonomous vehicles cannot truly arrive until consumers really trust that their vehicles are save against hacking. This discussion will present an in-depth examination of the specific technologies driving the autonomous vehicles revolution of the future, while detailing the security, reliability and safety requirements necessary to realize its full potential.
Smart and connected medical implants are the next frontier in the Internet of Things (IoT) and are set to revolutionize healthcare. Advancing our ability to interface technology with biological environments will enable patients to be monitored and receive treatment at home, and in the long term, have chronically implanted electronic devices seamlessly integrate with their everyday lives. As an example, clinically viable and minimally invasive neural interfaces stand to transform disease care for patients of neurological conditions. Recently there has been an explosion of research in Brain-Machine Interfaces (BMI) that has shown incredible results in using electronic signals from the motor cortex of the brain to control artificial limbs, providing hope for patients with spinal cord injuries. A major impediment to clinical translation is that state-of-the-art clinical neural interfaces are large, wired and require open-skull operation which leaves the patient at risk of infection and unable to move. Future, less invasive interfaces with increased numbers of electrodes, signal processing, and wireless connectivity will enable advanced prosthetics, disease control and completely new user-computer interfaces. Substantial improvements in neural implant longevity are needed to transition BMI systems from research labs to clinical practice. In this talk I will describe the development of a minimally invasive, wireless neural implant to enable chronic and stable neural recording. The implant is based on micro-electrocorticography (μECoG), an electrophysiological technique where electrical potentials are recorded from the surface of the cerebral cortex, reducing cortical scarring when compared with microelectrode recording techniques that pierce into the cortex. Wireless powering and readout are combined with a flexible, microfabricated antenna and electrode array with an ultra-low power integrated circuit. The low power consumption of the integrated circuit enables remote powering well below established IEEE and FCC safety limits, while the small size and flexibility of the implant minimizes the foreign body response. The improved implant safety and longevity gives wireless μECoG excellent prospects to become the technology of choice for clinically relevant neural interfaces in the foreseeable future.
Modern electronics does amazing things, but biology routinely performs feats no current electronics can match. Every animal can learn on short timescales, defend against unforeseen threats, self-assemble and repair, all with great resilience. The shortest path to incorporating these features in our gadgets is to understand how biology works, then adapt these techniques to the semiconductor world. Towards this end, biologists are in the midst of reconstructing and understanding the entire nervous system of small animals, while device physicists and software folks work out the devices and algorithms that might duplicate or better what biology has long done. This talk will give an overview of the investigation into biological systems, and some hints, based on our current understanding, of how this might be incorporated into our electronic gizmos. These techniques have the potential to add capabilities to our systems that are both different and more powerful, than those come from scaling and Moore alone.
The ever-increasing performance demands of performance visual and accelerated computing has resulted in GPUs becoming some of the most complex ASICs being built today. These multi-billion transistor processors push design technologies to their limits and require incredibly robust implementation methodologies. At the same time, there are new performance demands from both the traditional source of gaming thanks to higher resolution displays and virtual reality applications as well as new GPU uses like deep learning and autonomous driving. While we’ve been able to ride the performance, power and cost gains from process scaling over the last two decades to deliver GPUs with ever increasing capabilities, this rate of process scaling improvement is slowing down. It is clear that the rate of innovations in the design implementation areas will need to pick up if we are to keep delivering performance gains to our customers at the historical rate. In this talk we’ll cover the state of the art in visual and accelerated computing, the design approaches we use to implement these highly complex processors and finally propose ideas that will ensure that in spite of slowing process scaling, we’re able to continue to deliver GPUs of ever-increasing capabilities over the next decade.
The most important interface in a computer system is the instruction set architecture (ISA) as it connects software to hardware. So, given the prevalence of open standards for almost all other important interfaces, why is the ISA still proprietary? We argue that a free ISA is a necessary precursor to future hardware innovation, and there's no good technical reason not to have free, open ISAs just as we have free, open networking standards and free, open operating systems. The free and open RISC-V ISA began development at UC Berkeley in 2010, with the frozen base user ISA standard released in May 2014, and has since seen rapid uptake around the globe, including the first commercial shipments. This talk will cover the technical features of the RISC-V ISA design , which has the goals of scaling from the tiniest implementations for IoT up to the largest warehouse-scale computers, with support for extensive customization. We'll also describe three different industry-competitive open-source cores developed at UC Berkeley, all written in Chisel, a productive new open-source hardware design language. Finally, we'll describe the uptake of RISC-V and the development of the RISC-V ecosystem, including the RISC-V Foundation.
Mark Papermaster, CTO and SVP of Technology and Engineering at AMD, will take closer look at various challenges companies face when they set out to build winning products. Drawing up on more than 30 years of engineering experience, Mark explores innovation and what defines a great product, as well as his thoughts on the role of leadership to create an environment to enable both disruptive thinking combined with strong execution. He will describe three key elements, along with examples of his experience at IBM, Apple, Cisco, and AMD.
The first is goal clarity and definition that will distinguish the design as a great product. This requires discipline to think through not just the product itself, but how it will be used. The experience matters. The high level design then has to be rigorous to lay out a plan of the enabling factors, and the big problems to be solved.
Second is establishing a team that’s set up for success. Plotting out the right leadership, skills, geography, and culture is key.
Finally, execution always has to be prioritized. You can’t afford to miss the product’s market window. What you measure and milestone is what you care about – it sets the behavior of the team.
Mark will summarize by highlighting how the evolution of innovation and great products of the last several decades has set the stage for a huge inflection point in computing. We are now entering the era of immersive computing which will fundamentally change the role computing plays in our daily lives.
When it comes to computer security, attackers often seek out weaknesses at the abstraction boundaries in a system. Therefore, boundaries between layers such as the hardware, operating system, and application have a significant security impact. This talk will address how security is influenced by different dimensions of computing including hardware and software abstractions and scale, along with how threat models can help to manage this complexity. It concludes with a perspective on the largest security problems of the day: the ability for one entity to prove their security posture to another, simplifying security, and addressing the talent shortage. This talk is accessible to anyone interested in security and how it impacts the broad computing ecosystem.
Silicon integrated circuits based on CMOS technology form the basis for complex electronic systems with more than 10 billion transistors in a single chip. As the scaling of solid-state devices through Moore’s Law reaches an end and there is a search to expand the capabilities of CMOS technology to new applications through the addition of new materials (“more than Moore”), biological components represent a largely untapped opportunity. Living systems have lipid bilayer membranes, which act as capacitors, storing charge as ionic gradients across these membranes. Proteins that permeate these membranes (transmembrane proteins) are versatile biological electronic devices, controlling ion flow through the membrane. These proteins can harvest energy from the environment (and store this energy as electrochemical potentials) and can sense the environment (other molecules, temperature, pH, voltage, mechanical forces) and signal this by opening or closing the ion channel through the membrane. As a first foray into this exciting new area of exploration, we powered an integrated circuit using adenosine triphosphate (ATP), the energy currency of living systems, by integrating with a CMOS circuit an artificial cell membrane containing ATPase pumps that hydrolyze ATP and pump ions, producing a transmembrane potential that can power the solid-state integrated circuit. Despite these primitive first steps, this co-integration of CMOS and transmembrane proteins has the potential for impact a large number of applications: molecular diagnostics and drug discovery by providing new nanoscale sophistication to electrophysiological interfaces; new sensing systems for smell and taste; and the ability to detect and treat disease with real-time feedback through autonomous hybrid systems that could be symbiotic probes in living organisms. There may also be possibility to exploit the mechanical nature of ion channels and the ultra-low-voltage operation that they support to create hybrid ultra-low-power biological co-processors to augment CMOS in signal processing and computational applications.
DAC is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).
DAC 2018 will be held in San Francisco, California at Moscone Center West. Get details about travel, hotels, and area attractions in one convenient spot.