As a bellwether event for design engineers using EDA tools DAC enables the research community share the latest results from design automation tool developments, design methodologies and the increasingly important software/hardware developments in embedded designs.
The landscape was video-covered by EE Times with interviews of prominent EDA players and tool users.
In addition the following are a few DAC nuggets that add color to this landscape.
Bratin Saha, an Intel Principal Engineer and Manager in the SW Reuse and Convergence SoC Enabling Group, proposed a layered modular architecture called Cirus for SoC drivers to enable aggressive driver code reuse between OSes and platforms. Saha discussed the implementation of such a architecture in a media driver that is highly reusable across SoCs in different market segments and operating systems.
For his part, Intel researcher Shekhar Borkar talked about the EDA challenges for 3-D integration. These include model noise coupled from TSVs (Through-Silicon-Vias) to each other and to other interconnects and model clock skews and jitter across multiple stacked dies. With power to the stack delivered through successive dies in the stack, starting from the bottom most, optimizing power delivery to the entire stack is a necessity, according to Borkar.
"Floor-planning of each die needs to be done considering TSV locations on each die, and this step may even drive the final placement of TSVs," according to Borkar’s paper.
Thermal considerations for TSVs is the biggest challenge for EDA tools, according to Borkar, and include: modeling of heat flow, estimating temperature based on power consumption, providing input for partitioning, inserting TSVs to conduct heat, and overall global optimization of the 3-D stack for thermals.
Gadi Singer, vice president of the Intel Architecture Group and General Manager, SOC Enabling Group, said that the EDA industry faces a substantial shift to deal with electronic systems that are going through fundamental and rapid change in "domains ranging from TVs and in-vehicle devices to phones, tablets, and even PCs."
In his Wednesday keynote, Singer warned that today's SoC has become "a system of systems, not just a system". He proposed five principles for the EDA industry to adopt: the user model needs to be applied to designs; apply system world capabilities to the silicon world; optimization needs ot be across ICs, systems and software; be agile and learn from iterations as in the software world; and hardware IP should come with firmware and drivers, and verification suites.
Singer called for EDA to accept "new challenges with a sense of urgency" lest they miss their value-creating opportunities which will manifest in five to ten years.
In her keynote on Tuesday Freescale executive Lisa Sue made her pitch for bringing software together into the chip development tent in order to create the needed value for designers.
Meanwhile, peripheral to EDA developments there were a few interesting technical papers on diverse topics.
Researchers at Seoul National University together with University of Southern California at DAC introduced the first OLED power saving technique that does not result in a significant degradation in the color and luminance values of the displayed image.
Their technique is based on dynamic driving voltage scaling of the OLED panel. Although the proposed DVS technique may degrade luminance of the panel, the panel luminance can be restored with appropriate image compensation. Consequently, power is saved on the OLED display panel with only minor changes in the color and luminance of the image, according to their paper.
This technique is similar to dynamic backlight scaling of LCDs, but is based on the unique characteristics of the OLED drivers. Experimental results show that the proposed OLED DVS with image compensation technique saves up to 52.5 percent of the OLED power while keeping the same human-perceived image quality for the standard "Lena" multicolored image, according to the researchers.
For his part, Steve Wozniak, chief scientist at Fusion-io, in the Monday keynote welcomed his former Apple co-founder's introduction of iCloud for the consumer on the same day as Wozniak’s fireside chat keynote at DAC.
"Steve Jobs continues his quest "to hide the technology from the consumer," by enticing Apple device users to give up their data to Apple's "cloud" external storage. "I, on the other hand, love math, and to see how things work. I can go to sleep thinking of a problem and wake up with the answer," said Wozniak.
Wozniak was not on the DAC cloud computing panel, but if he were he would have proposed his "engineer’s engineer" answer to the EDA cloud computing conundrum.
As much as cloud computing has taken on the imagination of IT and the consumer world, the EDA community is still stoic on giving up their designs to a external entity in order to access them later.
"Security, the transfer of large data sets, and licensing models are of immediate concern," said panel chair Raul Campasano, who in the same breadth engineers a change in mindset.
He polled attendees as to when they think 30 percent of all EDA data will be stored in "clouds." The attendees voted 3 to 1 that will happen in eight years, as opposed to three years from now. The only venture capitalist on the panel, managing director Greg Gottesman of Madrona Venture Group, Inc., is on the board of Nimbic, Campasano’s company. Nimbic is pursuing EDA for cloud computing.
Panelists from Cadence, Synopsys, GlobalFoundries and IBM had a hard time accepting cloud computing to EDA work despite Gottesman's pleas: "Why wouldn't you want to have data access at much higher speeds than currently available in desktop environments? EDA vendors and designers need to take the plunge and experience designing chips from anywhere, at anytime, using tablets, smart phones."