Will Highlight NVM IP's Ultra Low-Power, High-Performance, Availability on TSMC 180nm to 16nm Process Nodes, and How Antifuse Is the Future NVM Foundation IP Below 16nm
SAN JOSE, CALIF. –– May 28, 2015
WHO: Kilopass Technology, Inc., a leading provider of semiconductor logic non-volatile memory (NVM) intellectual property (IP)
WHAT: Will be a featured presenter at the 52nd Design Automation Conference (DAC) in the ChipEstimate Booth (#2433), the ICScape Booth (#1602) and the TSMC Booth (#1933)
WHEN: Monday, June 8 through Wednesday, June 10
WHERE: Moscone Center, San Francisco
Kilopass will present "Antifuse Memory: The New NVM Foundation IP" in the ChipEstimate booth (#2433) on:
Monday, June 8, at 1:30 p.m.
Tuesday, June 9, at 11:30 a.m.
Wednesday, June 10...
Will Feature New ARM Cortex-A72 Processor Model
ACTON, MASS. –– May 27, 2014
WHO: Carbon Design Systems® Inc., the leading supplier of accurate virtual prototype solutions
WHAT: Will demonstrate its system-level virtual prototype solutions and virtual prototype models during the 52nd Design Automation Conference (DAC) in the ARM® Connected Community Pavilion (Booth #2414). Also on display will be Carbon Performance Analysis Kits (CPAKs) for performance analysis, pre-silicon software development and accurate system benchmarking of advanced ARM processors and intellectual property (IP), including its new ARM Cortex®-A72 Processor model.
WHEN: Monday, June 8, and Tuesday, June 9, from 10 a.m. until 7 p.m. and Wednesday, June 10, from 10 a.m. until 6 p.m. ...
Designer, IP Track Poster Session to Feature "Secure System Design With Tortuga Logic's Prospect”
SAN DIEGO, CALIF. –– May 27, 2014
WHO: Tortuga Logic, transforming the way hardware designers and system architects test the security of hardware designs
WHAT: Will demonstrate its comprehensive Prospect Hardware Security Design and Analysis Toolkit at the 52nd Design Automation Conference (DAC) in the OneSpin Solutions booth (#3126)
WHEN: Monday, June 8, through Wednesday, June 10
WHERE: Moscone Center, San Francisco
Tortuga Logic’s Dr. Jason Oberg will participate in the Designer and IP Track Poster Session, discussing “Secure System Design with Tortuga Logic”s Prospect,” Tuesday, June 9, from 4:30 p.m. until 6 p.m. on the DAC Exhibit Floor.
More information about DAC can be...
WILSONVILLE, Ore., May 27, 2015
The Veloce® Power Application Software delivers:
• A complete solution that enables a new comprehensive methodology for power
-Accurate and early switching activity at the application level
-Early budgeting and tradeoff exploration at RTL
-Analysis and sign off at the gate level
• Real-time transfer of power switching activity, via a Dynamic Read Waveform API, to power analysis tools replacing current file-based activity transfer methodology
• Tight integration with an ecosystem of industry-recognized power analysis tools
For a technical whitepaper visit: http://www.mentor.com/products/fv/techpubs/download/?id=90538
Mentor Graphics Corporation (NASDAQ: MENT) today released the Veloce® Power Application...
So-ADE Debugger Developed to be Easy to Use, Intuitive
SAINT GEOIRE EN VALDAINE, FRANCE –– May 21, 2015 –– So-ADE™ today announced immediate availability of an easy-to-use and intuitive debugger for the development and debugging of the SystemVerilog, VHDL and UPF parser platform from Verific Design Automation.
Meant for C/C++ developers, So-ADE adds electronic design automation (EDA) concept knowledge to the debugger level. It automatically manipulates the Abstract Syntax Tree (AST) from VHDL, Verilog or SystemVerilog hardware description languages, parsing for faster code development and algorithm debug with commonly used data structures.
“We’re delighted that So-ADE created a product around our parser platform, and they have our full support,” notes...
Apps Model Adopted by OneSpin Solutions, Tortuga Logic to Link Formal Verification Platform with Hardware Security Design and Analysis Toolkit
SAN DIEGO and SAN JOSE, CALIF. –– May 21, 2015 –– OneSpin Solutions™ and Tortuga Logic today signed a multi-year original equipment manufacturer (OEM) agreement, enabling Tortuga to integrate OneSpin 360 LaunchPad™, OneSpin’s new adaptive formal platform, with Prospect, its Hardware Security Design and Analysis Toolkit.
LaunchPad, introduced today by OneSpin Solutions, offers a way for third-party suppliers such as Tortuga Logic to embed its formal verification software into their products or “apps.” (See separate news release titled “OneSpin Solutions Catalyzes Unique, Third-Party Verification Solutions by Delivering OneSpin...
Advanced Formal Verification Technology Platform from OneSpin Used by Partner Companies in Range of New, Unique Verification Solutions
SAN JOSE, CALIF. –– May 21, 2015 –– OneSpin Solutions™, provider of innovative formal solutions targeting a broad range of challenging verification problems, today unveiled 360 LaunchPad™, an adaptive formal technology platform that allows third-party companies with limited knowledge of formal technology to develop and deliver formal-based apps.
LaunchPad is a complete formal environment that can be utilized by app developers without in-house formal technology or expertize. It allows domain experts to efficiently create formal-based solutions targeting their field on a proven underlying verification foundation. LaunchPad may be delivered as...
Apps Model Links Formal Verification Platform to Automatic Register Verification Software
LOWELL, MASS., and SAN JOSE, CALIF. –– May 21, 2015 –– OneSpin Solutions™ and Agnisys, Inc., today signed a multi-year original equipment manufacturer (OEM) agreement, whereby Agnisys will integrate OneSpin’s LaunchPad™, OneSpin’s new adaptive formal platform, into its ARV-Formal™ automatic register verification software.
Introduced today by OneSpin Solutions, LaunchPad gives third-party suppliers a way to embed its formal verification software into their products, or “apps.” (See separate news release titled “OneSpin Solutions Catalyzes Unique, Third-Party Verification Solutions by Delivering OneSpin 360 LaunchPad, First Adaptive Formal Platform.”)
Agnisys, under terms of the...
NanoSpice Giga Replaces FastSPICE in Memory Design and Verification Flow
SAN JOSE, CALIF. –– May 19, 2015 –– ProPlus Design Solutions, Inc. today announced Attopsemi Technology Co., of Hsinchu, Taiwan, developer of state-of-art logic-compatible one-time-programmable (OTP) memory intellectual property (IP), has adopted its high-capacity, high-performance parallel GigaSpice simulator for giga-scale circuit simulation.
Attopsemi replaced its existing FastSPICE simulator in its design and verification flow with ProPlus’ NanoSpice Giga™ because of its highly accurate and superior performance.
“Since our founding in 2010, we have been on a mission to provide the best logic-compatible OTP IP for SoC integrations from 0.7um to 7nm CMOS that’s smaller, higher...
New Accurate Model, 10 Systems Available on Carbon’s IP Exchange Web Portal for Download, Broadening Carbon’s Range of Accurate Solutions
ACTON, MASS. –– May 19, 2015 –– Carbon Design Systems, Inc., the leading supplier of accurate virtual prototype solutions, announced today immediate availability of multiple Carbon Performance Analysis Kits (CPAKs) featuring the ARM® Cortex®-A72 processor core.
In addition, designers can now configure their own implementation accurate virtual model of the Cortex-A72 on Carbon’s IP Exchange web portal.
“Our growing portfolio of CPAKs and the new Cortex-A72 virtual model offers designers a wide range of accurate solutions easily downloadable from our system and IP web portals,” notes Bill Neifert, Carbon’s chief...