DAC 2010 ANAHEIM JUNE 13-18
 
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DAC 42nd Talk Index

These talks are video-on-demand web recordings, synched with powerpoint slides, of key 42nd DAC sessions. DAC provides these recordings, free of charge, as a service to the DA community.

TUESDAY KEYNOTE | How Does One Define "Technology" Now That Classical Scaling Is Dead (and Has Been for Years)?
Bernard S. Meyerson - IBM Corp.
   

SESSION 1 | CEO PANEL: Differentiate and Deliver: Leveraging your Partners from Product Concept to Production (CEO Panel)
Speakers: Warren East - ARM Ltd., Cambridge, UK
Michael J. Fister - Cadence Design Systems, Inc., San Jose, CA
Aart De Geus - Synopsys, Inc., Mountain View, CA
Jackson Hu - United Microelectronics Corp., Hsinchu, Taiwan
Walden C. Rhines - Mentor Graphics Corp., Wilsonville, OR

SESSION 6 | PANEL: ESL: Tales from the Trenches
Sorry, no longer available.

SESSION 11 | PANEL: DFM Rules!

Speakers: Atul Sharan - Clear Shape Technologies, Inc., Sunnyvale, CA
Alex Alexanian - Ponte Solutions, Inc., Mountain View, CA
Harold Lehon - KLA-Tencor Corp., San Jose, CA
Peter Rabkin - Xilinx, Inc., San Jose, CA
Carlo Guardiani - PDF Solutions, Inc., San Jose, CA
Premal Buch - Magma Design Automation, Inc., Santa Clara, CA



SESSION 16 | Special Session: Closing the Power Gap Between ASIC and Custom
16.1 Closing the Power Gap between ASIC and Custom: An ASIC Perspective
Speakers: David G. Chinnery - Univ. of California, Berkeley, CA
Authors: David G. Chinnery, Kurt Keutzer - Univ. of California, Berkeley, CA
            

16.2 Explaining the Gap between ASIC and Custom Power: A Custom Perspective
Speaker: Andrew Chang - Cadence Design Systems, Inc., San Jose, CA
Authors: Andrew Chang - Cadence Design Systems, Inc., San Jose, CA
William J. Dally - Stanford Univ., Stanford, CA
            

16.3 Keeping Hot Chips Cool
Speaker: Ruchir Puri - IBM Corp., Yorktown Heights, NY
Authors: Ruchir Puri, Leon Stok, Subhrajit Bhattacharya - IBM Corp., Yorktown Heights, NY
            

SESSION 26 | Special Session: Emerging Directions in Wireless
26.1 Cognitive Radio Techniques for Wide Area Networks
Speaker/Author: Bill Krenik - Texas Instruments Inc., Dallas, TX
           

26.2 MIMO Technology for Advanced Wireless Local Area Networks
Speaker/Author: Jeffery M. Gilbert - Atheros Communications, Inc., Sunnyvale, CA
           

26.3 Challenges of Ultra Low Power Wireless System Design
Speaker/Author: Ahmad Bahai - National Semiconductor Corp., Santa Clara, CA
     no paper       

26.4 RF-MEMS in Wireless Architectures
Speaker/Author: Clark T.-C. Nguyen - DARPA, Arlington, VA
           

SESSION 36 | Special Session: MATLAB ® - The Other Emerging System-Design Language
36.1 MATLAB as a Design Environment for Wireless ASIC Design
Speaker/Author: Erik Lindskog - Beceem Communications, Inc., Santa Clara, CA
     no paper        

36.2 MATLAB Extensions for the Development, Testing, and Verification of Real-Time DSP Program Development
Speaker: David P. Magee - Texas Instruments, Inc., Dallas, TX
Author: David P. Magee - Texas Instruments, Inc., Dallas, TX
            

36.3 MATLAB as a Development Environment for FPGA Design
Speaker: Tejas Bhatt - Nokia Americas, Irving, TX
Authors: Tejas Bhatt, Dennis McCain - Nokia Americas, Irving, TX
            









SESSION 41 | Special Session: Formally Verifying Your 10-Million Gate Design
41.1 Formal Verification: IsIt Real Enough?
Speaker: Yaron Wolfsthal - IBM Corp., Haifa, Israel
Author: Yaron Wolfsthal - IBM Corp., Haifa, Israel
Rebecca M. Gott - IBM Corp., Poughkeepsi, NY
           


41.2 Can We Really Do Without the Support of Formal Methods in the Verification of Large Designs?
Speaker/Author: Umberto Rossi - STMicroelectronics, Milano, Italy
           

41.3 Streamline Verification Process with Formal Property Verification to Meet Highly Compressed Design Cycle
Speaker/Author: Prosenjit Chattterjee - NVIDIA Corp., Santa Clara, CA
           

THURSDAY KEYNOTE | Innovation in the EDA Business Need Not Be an Oxymoron
Ronald A. Rohrer - Cadence Design Systems, Inc.
    

SESSION 46 | Special Session: DFM and Variability: Theory and Practice
46.1s BEOL Variabiity and Impact on RC Extraction
Speaker: Nagaraj NS - Texas Instruments, Inc., Dallas, TX
Authors: Nagaraj NS - Texas Instruments, Inc., Dallas, TX
          slides not available 

46.2s An Effective DFM Strategy Requires Accurate Process and IP Pre-Characterization
Speaker: Carlo Guardiani - PDF Solutions, Inc., San Jose, CA
Authors: Carlo Guardiani, Massimo Bertoletti, Christoph Dolainsky, Nicola Dragone, Marco Malcotti, Patrick McNamara - PDF Solutions, Inc., San Jose, CA
           

46.3s Variation-Tolerant Circuits: Circuit Solutions and Techniques
Speaker/Auhtor: Vivek De - Intel Corp., Hillsboro, OR
           

46.4s On the Need for Statistical Timing Analysis
Speaker/Author: Farid N. Najm - Univ. of Toronto, Toronto, Canada
           


46.5s CAD Tools for Variation Tolerance
Speaker: David Blaauw - Univ. of Michigan, Ann Arbor, MI
Authors: David Blaauw, Kaviraj S. Chopra - Univ. of Michigan, Ann Arbor, MI
           

46.6s Are There Economic Benefits in DFM?
Speaker: Riko Radojcic - QUALCOMM Incorporated, San Diego, CA
Authors: Matt Nowak, Riko Radojcic- QUALCOMM Incorporated, San Diego, CA
           

SESSION 51 | Special Session: Hierarchical Design and Design Space Exploration of Analog Integrated Circuits
51.1 Deterministic Approaches to Analog Performance Space Exploration
Speaker: Daniel Mueller - Tech. Univ. of Munich, Munich, Germany
Authors: Daniel Mueller, Guido Stehr, Helmut Graeb, Ulf Schlichtmann - Tech. Univ. of Munich, Munich, Germany
           

51.2 Mixed-Signal Design Space Exploration Through Analog Platforms
Speaker: Fernando De Bernardinis - Univ. of California, Berkeley, CA
Authors: Fernando De Bernardinis - Univ. of California, Berkeley, CA
Pierluigi Nuzzo - Univ. of Pisa, Pisa, Italy
Alberto Sangiovanni-Vincentelli - Univ. of California, Berkeley, CA
           

51.3 Performance Space Modeling for Hierarchical Synthesis of Analog Integrated Circuits
Speaker: Georges Gielen - Katholieke Universiteit Leuven, Leuven, Belgium
Authors: Georges Gielen, Trent McConaghy, Tom Eeckelaert- Katholieke Universiteit Leuven, Leuven, Belgium
           

IEEE Solid State Circuits Society Electronic Design Automation Consortium CEDA - IEEE Council on Electronic Design Automation SIGDA Special Interest Group - Design Automation