DAC 2010 ANAHEIM JUNE 13-18
 
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44th DAC Talk Index

MONDAY KEYNOTE | Designing a New Automotive DNA
Speaker: Lawrence D. Burns - Vice President of Research & Development and Strategic Planning, General Motors Corp.
      (139M)

TUESDAY KEYNOTE | Perspective of the Future Semiconductor Industry: Challenges and Solutions
Speaker: Oh-Hyun Kwon - President, System LSI Division, Samsung Semiconductor Business
     

THURSDAY KEYNOTE | Design without Borders -- A Tribute to the Legacy of A. Richard Newton
Speaker: Jan Rabaey - Donald O. Pederson Distinguished Professor, Director Gigascale Systems Research Center (GSRC), Scientific Co-director BWRC, University of California, Berkeley
     

SESSION 1 | SPECIAL SESSION: Trusted Hardware

1.2 Trusted Design in FPGAs
Speaker/Author: Steve Trimberger - Xilinx Research Labs
          
1.3 Physical Unclonable Functions for Device Authentification and Secret Key Generation
Speaker: G. Edward Suh - Cornell Univ.
Authors: G. Edward Suh, Srinivas Devadas - Cornell Univ.
          
1.4 Side-Channel Attack Pitfalls
Speaker/Author: Kris Tiri - Intel Corp.
          

SESSION 6 | Leakage Power Analysis and Optimization
6.1 Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization
Speaker: De-Shiuan Chiou - National Tsing-Hua Univ.
Authors: De-Shiuan Chiou, Da-Cheng Juan, Yu-Ting Chen, Shih-Chieh Chang - National Tsing-Hua Univ.
          
6.2 Width-dependent Statistical Leakage Modeling for Random Dopant Induced Threshold Voltage Shift
Speaker: Chris Kim - Univ. of Minnesota
Authors: Jie Gu, Sachin S. Sapatnekar, Chris Kim - Univ. of Minnesota
          
6.3 Modeling and Estimation of Full-Chip Leakage Current Considering Within-Die Correlation
Speaker: Khaled R. Heloue - Univ. of Toronto
Authors: Khaled R. Heloue, Navid Azizi, Farid N. Najm - Univ. of Toronto
          
6.4 Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
Speaker: Tao Li - Tsinghua Univ.
Authors: Tao Li, Zhiping Yu - Tsinghua Univ.
          
6.5 Skewed Flip-Flop Transformation for Minimizing Leakage in Sequential Circuits
Speaker: Jun Seomun - KAIST
Authors: Jun Seomun, Jaehyun Kim, Youngsoo Shin - KAIST
          

SESSION 11 | SPECIAL SESSION: Functional Verification of ESL Models
11.1 Formal Techniques for SystemC Verification
Speaker/Author: Moshe Y. Vardi - Rice Univ.
          
11.2 Design for Verification at System-Level and RTL
Speaker: Anmol Mathur - Calypto Design Systems, Inc.
Authors: Anmol Mathur, Venkatram Krishnaswamy, - Calypto Design Systems, Inc.
          
11.3 Verification Methodologies in a TLM-to-RTL Design Flow
Speaker: Atsushi Kasuya - JEDA Technologies, Inc.
Authors: Atsushi Kasuya, Tesh Tesfaye - JEDA Technologies, Inc.
          
11.4 Memory Modeling in ESL-RTL Equivalence Checking
Speaker: Alfred Koelbl - Synopsys, Inc.
Authors: Alfred Koelbl, Jerry Burch, Carl Pixley - Synopsys, Inc.
          

SESSION 16 | Distributed Computing: Automotive Network Design and Analysis
16.1 Period Optimization for Hard Real-time Distributed Automotive Systems
Speaker: Abhijit Davare - Univ. of California
Authors: Abhijit Davare, Qi Zhu, Marco Di Natale - Univ. of California
          
16.2 Performance Analysis of FlexRay-based ECU Networks
Speaker: Unmesh Bordoloi - National Univ. of Singapore
Authors: Andrei Hagiescu, Unmesh D. Bordoloi, Samarjit Chakraborty - National Univ. of Singapore
Prahladavaradan Sampath, P. Vignesh, V. Ganesan, S. Ramesh - General Motors R&D
Alberto Sangiovanni-Vincentelli - Univ. of California
Sri Kanajan - General Motors Corp.
Claudio Pinello - Cadence Design Systems, Inc.
          
16.3 Experimental Jitter Analysis in a FlexCAN Based Drive-by-Wire Automotive Application
Speaker: Juan R. Pimentel - Kettering Univ.
Authors: Juan R. Pimentel, Jason W. Paskvan - Kettering Univ.
          
16.4 Optimization of Static Task and Bus Access Schedules for Time-Triggered Distributed Embedded Systems with Model-Checking

Speaker: Xiuqiang He - Hong Kong Univ. of Science & Tech.
Authors: Zonghua Gu, Xiuqiang He, Mingxuan Yuan - Hong Kong Univ. of Science and Tech.
          


SESSION 21 | INVITED SESSION: Silicon, Safety and Self-Driving Cars
21.1 There Is More Than Moore In Automotive
Speaker/Author: Hartmut Hiller - Infineon Technologies AG
          
21.2 Modeling Safe Operating Area in Hardware Description Languages
Speaker: Leonid B. Goldgeisser - Synopsys, Inc.
Authors: Leonid B. Goldgeisser, Ernst Christen, Zhichao Deng - Synopsys, Inc.
          

SESSION 26 | PANEL: Electronics: The New Differential in the Automotive Industry
Chair: Walden C. Rhines - Mentor Graphics Corp., Wilsonville, OR
Panelists:
Andrew Chien - Ricardo Strategic Consulting, Detroit, MI
Deepak Goel - Formerly Ford Motor Company, Dearborn, MI
Christopher Hegarty - Infineon Technologies AG, Munich, Germany
Alberto Sangiovanni-Vincentelli - Univ. of California, Berkeley, CA
Frank Winters - Delphi Electronics and Safety, Kokomo, IN

SESSION 31 | SPECIAL SESSION: Virtual Automotive Platforms
31.2 Automotive Software Integration
Speaker: Rolf Ernst - Tech. Univ. of Braunschweig
Authors: Razvan Racu, Arne Hamann - Tech. Univ. of Braunschweig
Kai Richter - Symtavision GmbH
          

31.4 Computer-Aided Architecture Design and Optimized Implementation of Distributed Automotive EE Systems
Speaker/Author: Antal Rajnak - Mentor Graphics Corp.
          

SESSION 36 | SPECIAL SESSION: Synthetic Biology: An Emerging Discipline with New Engineering Rules and Design Tools
36.1 Synthetic Biology: From Bacteria to Stem Cells
Speaker/Author: Ron Weiss - Princeton Univ.
          
36.2 Engineering Synthetic Killer Circuits in Bacteria
Speaker/Author: Lingchong You - Duke Univ.
          
36.3 Programming Living Cells to Function as Massively Parallel Computers
Speaker/Author: Jeff Tabor - Univ. of California
          
36.4 Synthesizing Stochasticity in Biochemical Systems
Speaker: Marc D. Riedel - Univ. of Minnesota
Authors: Brian Fett - Univ. of Minnesota
Jehoshua Bruck - California Inst. of Tech.
Marc D. Riedel - Univ. of Minnesota
          

SESSION 42 | SPECIAL SESSION: Thousand-Core Chips
42.1 Thousand-Core Chips - A Technology Perspective
Speaker/Author: Shekhar Y. Borkar - Intel Corp.
          
42.2 The Kill Rule for Multicore
Speaker: Anant Agarwal - Massachusetts Institute of Tech.
Authors: Anant Agarwal - Massachusetts Institute of Tech.
Markus Levy - EEMBC
          
42.3 Implicitly Parallel Programming Models for Thousand-Core Microprocessors
Speaker: Wen-Mei Hwu - Univ. of Illinois
Authors: Wen-Mei Hwu, Shane Ryoo, Sain-Zee Ueng - Univ. of Illinois
John H. Kelm, Sam S. Stone, Robert E. Kidd, Sara S. Baghsorkhi, Aqeel A. Mahesri, Stephanie C. Tsao, Steve S. Lumetta, Matthew I. Frank, and Sanjay J. Patel - Univ. of Illinois
Isaac Gelado, Nacho Navarro - Universitat Politecnica de Catalunya
          
42.4 Multi-Core Design Automation Challenges
Speaker/Author: John Darringer - IBM Corp.
          

SESSION 48 | Dynamic Verification of Processors and Processor-Based Designs
48.1 Intelligent Interleaving of Scenarios: A Novel Approach to System Level Test Generation
Speaker: Itai Jaeger - IBM Corp.
Authors: Shady Copty, Itai Jaeger, Yoav Katz, Michael Vinov - IBM Corp.
          
48.2 Automatic Verification of External Interrupt Behaviors for Microprocessor Design
Speaker: Fu-Ching Yang - National Sun Yat-Sen Univ.
Authors: Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang - National Sun Yat-Sen Univ.
          
48.3 A Framework for the Validation of Processor Architecture Compliance
Speaker: Itai Jaeger - IBM Corp.
Authors: Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled - IBM Corp.
          
48.4 Functional Verification of SiCortex Multiprocessor System-on-a-Chip
Speaker: Wilson Snyder - SiCortex, Inc.
Authors: Oleg Petlin, Wilson Snyder - SiCortex, Inc.
          
IEEE Solid State Circuits Society Electronic Design Automation Consortium CEDA - IEEE Council on Electronic Design Automation SIGDA Special Interest Group - Design Automation