Press Release
DAC, Chips to Systems Conference Announces Executive Committee for the 2026 Conference and Exhibition
LONG BEACH, CA –– October 1, 2025 ––DAC, The Chips to Systems Conference (DAC), the global event dedicated to electronic design and design automation of electronic circuits and systems, is thrilled to announce its executive committee for the upcoming 2026 DAC.
Dr. Renu Mehra, Vice President of Engineering at Synopsys, will serve as the General Chair for the 2026 conference. Joining her as Vice Chair is Dr. David Pan, Professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin. Together, they will lead the DAC Executive Committee (EC), guiding the technical program, exhibition, and strategic initiatives while shaping all aspects of conference operations and publicity.
DAC 2026 will take place at the Long Beach Convention Center in Long Beach, California, from July 26–29, 2026. The call for contributions opens October 1, 2025, with full details available at DAC.com.
Reflecting on her new role, Dr. Mehra said, “DAC has long been the premier venue for innovation, bringing together system and chip designers, researchers, academics, government leaders, and the electronic design community. While rooted in EDA, DAC now spans a much broader landscape — from AI-driven design automation and AI hardware architecture to microelectronics security and autonomous systems. I’m honored to collaborate with such a dedicated group of volunteers as we prepare for DAC 2026 and chart the course for future advancements.”
The distinguished members of the 2026 DAC Executive Committee include:
Vice Chair – David Pan, University Texas, Austin
Technical Program Chair – Natarajan (Nat) Viswanathan, Cadence Design Systems
Technical Program Co-Chair – Rajiv Joshi, IBM
Technical Program Co-Chair – Jiang Hu, Texas A&M University
Panel Chair –Farinaz Koushanfar, University California, San Diego
Special Sessions Chair – Ambar Sarkar, Nvidia
Tutorials/Workshops Chair – Jingtong Hu, University of Pittsburgh
Chiplets/Systems Chair – Puneet Gupta, University California, Los Angeles
AI Chair – Rajeev Jain, Qualcomm
Engineering Track Program Chair – Frank Schirrmeister, Synopsys
Engineering Track Program Vice-Chair – Henning Spruth, NXP
Special Programs Chair –Sathishkumar Balasubramanian, Siemens
Exhibits Chair – Richard Paw, Microsoft
Finance Chair – Patrick Groeneveld, AMD and Stanford University
Finance Vice-Chair & Awards Chair – Frank Liu, Old Dominion University
Publicity/Marketing Chair – Michelle Clancy Fuller, Cayenne Global
Past Chair – Helen Li, Duke University
ACM SIGDA Representative – Sharon Hu, University of Notre Dame
ACM SIGDA Representative – Wanli Chang, Hunan University
IEEE CEDA Representative – Gi-Joon Nam, IBM
IEEE CEDA Representative – L. Miguel Silveira, Technical University Lisbon
Conference Management – Laura LeBlanc, Conference Catalyst
Exhibit Manager – Pete Erickson, Hall-Erickson
Dr. Renu Mehra is Vice President of Engineering at Synopsys, where she has led core R&D in the Silicon Realization / Design Methodologies domains. She is currently heading the Design Methodology Center of Excellence in the IP Group and previously led the Design Compiler (RTL synthesis) team in the EDA group. She was a founding member of the IEEE 1801 working group that drove the creation of the Unified Power Format (UPF), now the dominant industry standard for capturing power intent. At Synopsys, her innovations span automated clock gating, multi-voltage / power domain design, congestion-aware optimization, PPA tuning, and low-power signoff techniques. Her technical leadership has earned her multiple honors, including the 2021 Marie R. Pistilli Women in Electronic Design Achievement Award, the 2020 YWCA Silicon Valley Tribute to Women Award, and the 2023 Distinguished Alumnus Award from IIT Kanpur. She also holds numerous U.S. patents—among them, inventions in low-power static signoff integration and secondary power-ground aware buffering—and frequently serves on executive and technical committees for DAC, ISLPED, and other leading conferences in design automation.
About DAC
DAC, The Chips to Systems Conference is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies, and technologies. A highlight of DAC is its exhibition and suite area with approximately 150 of the leading and emerging EDA, intellectual property (IP) design infrastructure and electronic design ecosystem providers. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE) and is supported by ACM's Special Interest Group on Design Automation (ACM SIGDA) and IEEE's Council on Electronic Design Automation (IEEE CEDA).
Design Automation Conference acknowledges trademarks or registered trademarks of other organizations for their respective products and services.
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For more information, please contact:
Michelle Clancy Fuller, Cayenne Global, LLC
2026 DAC Publicity/Marketing Chair
Press@dac.com or call 1-503-702-4732