The DAC Front-End Design Track is one of the DAC Engineering Tracks and the premier forum the community of design engineers use to get together and share their challenges and their approaches to solving them.

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The Front-End Design Track includes presentations and poster sessions to facilitate information sharing and interactions. It offers an exclusive opportunity to connect with and learn from other industry experts about best practices and current trends in front-end design and verification. There is no better way to improve your "design IQ" in such a short amount of time.

The Front-End Design Track committee is looking for submissions that tackle relevant topics and provide high-quality content which target challenges, innovations and trends in chip design focusing on Front-End Design defined as getting to verified RTL and verified behvioral descriptions, including IC architecture, design, simulation, validation and verification solutions for Systems on Chips (SoCs) and chiplet-based multi-die designs. Use of cloud (public or private) for improving quality of results in front-end topics is of interest.

The deadline to submit for Call for Contributions is January 12, 2026.

All accepted presentation and poster presenters are required to register for 63 DAC at either the Engineering or Full Conference registration rates; presentation is contingent on registering by April 24, 2026.

Submission Information

The following are required for your submission:

  • The title of the presentation

  • Abstract of 100-200 words

  • Submission Categories

  • Presenter(s) name, affiliation, city, state, country, and email address

  • For evaluation by the Program Committee, a six (6) slides* PowerPoint presentation. Please review the guidelines below for suggested presentation structure.

*Additional information may be added in the notes section for each slide.

The following guidelines should be followed when preparing your slides for submission:

  • Submissions are limited to 6 total slides*.

  • Submissions must be in PowerPoint format: 16:9 aspect ratio.

  • Consistent with DAC policy, company logos may appear only on the title slide.

    • Slide 1: Title, author names and affiliations

      • Authors may NOT be added after acceptance, so be sure to list all authors in the initial submission.

    • Slide 2: Motivation

      • Include an introduction that specifies the context and motivation of the submission. Examples: identify challenges associated with the design task at hand, clarify where in the design process the tools are used, and explain why the problem addressed is of interest to the audience.

    • Slide 3: Main Idea

      • Include details on the specific contributions of your work. Examples: innovative use of tools to achieve a specific goal, user enhancements to the tool and/or tool flow, dealing with scalability, details of integrating IP, study of design trade-offs, interfacing with manufacturing.

    • Slide 4: Additional Content Slide

      • Flexibility to add a slide that demonstrates value of the paper/idea

    • Slide 5: Evidence

    • Slide 6: Summary

      • Include a summary that highlights the main results of your work. Results are needed to evaluate the impact of your contribution. Metrics that could be used include productivity enhancement, improved quality of silicon, decreased complexity, and reduced time-to-market.

  • Important: Ensure that you have the necessary legal, trademark, copyright, and/or organizational approval needed to submit your presentation. Take appropriate steps to get this approval early, as the submissions deadline cannot be extended.

*Note: The presentation format described above is what is required for your submission to be reviewed by the Technical Program committee to decide Accept/Reject. The final presentation delivered at DAC will be made up of a Title slide, Author slide and 12 content slides. The expectation is that the final presentation will expand on the submission presentation.

Documented tool use may target electronic design and system design at all levels of abstraction and across all application domains. Regular submissions will be accepted in the following categories:

Front-End Silicon Design (FE)

Front end architecture, design and verification of current day System-on-Chip (SoC) including major components such as CPU, GPU, and DSP. Front end design of entire SoC sub-systems such as graphics, multimedia and modem.

  • FE.01 Architecture Exploration/Design/Optimization of CPU, GPU, DSP, Modem, and Accelerators, System and High-Level Hardware Synthesis

  • FE.07 Logic/RTL Synthesis

  • FE.02 Memory/Bus/Network Architecture/Design

  • FE.08 Security: Modeling, Analysis and Synthesis, Security Threats and Metrics, Device, Circuit and Architecture Techniques for Security, Hardware Security Verification and Validation, System-Level Techniques for Security and Hardware Support for Software and Security

  • FE.03 Low-Power Design and Trade-offs

  • FE.09 Machine Learning Techniques for Verification, Logic/RTL Synthesis

  • FE.04 Design Verification, Test Planning, and Coverage

  • FE.10 Chip Architectures and Designs Targeting ML/AI Applications, System Design Targeting ML/AI Applications

  • FE.05 Validation, Logic Simulation, Emulation, Hardware Acceleration, FPGAs

  • FE.11 Cloud Adoption in Design and Verification Flows, Case Studies in Cloud Migration and Cloud Infrastructure for EDA Applications

  • FE.06 Formal Verification, Linting

  • Accepted Front End Design Track presentations and posters are NOT included in the DAC proceedings. However, accepted Front-End Design Track submissions (both posters and presentation slides) will be made available on the DAC website after the conference as a part of the DAC Archives (subject to approval from the authors).

  • All Front-End Design Track submissions, if accepted, will be shared with the rest of the conference as posters in dedicated 60-minute group sessions. Some submissions, on top of the poster session, will also be scheduled for 15-minute presentations.

  • Best Presentation and Poster awards will be selected from the Front-End Design Track submissions. The awards will be based on (a) the quality of the submission, (b) the presentation given at DAC, and (c) the presentation at the poster session.

Timeline

September 30, 2025

Submission Site Opens

January 12, 2026

Submission Deadline

March 2, 2026

Accept/Reject Notifications Sent

March 23, 2026

Presentation Confirmation Due

April 24, 2026

Presenter Registration Deadline

April 29, 2026

Draft Slides/Poster Submission
Deadline

May 28, 2026

Slide Feedback Provided

June 4, 2026

Final Slides Due

July 26, 2026

DAC Begins

Submission Selections

Please select up to two of the following Topic Areas:

  • Artificial Intelligence (AI)

  • Security

  • Design

  • Systems

  • Electronic Design Automation

Please select up to three of the following Keywords:

  • AI and Machine Learning

  • Formal/Static Methods

  • Analog & Mixed-signal Design

  • Low Power

  • Architecture & System Design

  • Logic & High-level Synthesis

  • Chiplets, Interconnects and 3D Integration

  • Manufacturing and Process

  • Circuits and Technology

  • Physical Design

  • Cloud Computing, Compute/Storage Infrastructure

  • Quantum Computing

  • Design Technology Co-optimization

  • Safety & Reliability

  • Embedded Systems and IoT

  • Security & Privacy

  • Emerging Technologies

  • Test and Design for Test (DFT)

  • FPGA Systems

  • Verification & Validation

If a submission will be relevant to a specific industry or industries, one or more of the following industries may be selected:

  • Aerospace and Defense

  • Industrial

  • Automotive

  • Wireless Communications

  • Consumer

  • Wired Communications

  • Data Center

Frank Schirrmeister

Synopsys

Engineering Program Chair

Henning Spruth

NXP Semiconductors

Engineering Program Vice Chair