Artificial intelligence is now deeply embedded in the semiconductor design conversation, but separating real engineering impact from aspirational hype remains a challenge for both technical and business leaders. This TechTalk provides a clear, grounded view of where Agentic AI is actually delivering measurable value in chip design workflows today, and where expectations still exceed practical reality.
The talk will examine concrete use cases across the design lifecycle, including architectural exploration, RTL quality analysis, verification acceleration, physical design optimization, and design closure. Rather than focusing on specific tools or products, the presentation will emphasize underlying techniques, deployment patterns, and organizational lessons learned from real-world adoption. Key questions addressed include: What types of design problems are well-suited for modern agentic AI approaches? Where do data availability and model generalization break down? How do teams integrate AI into existing EDA flows without disrupting proven methodologies?
The session will also explore the implications for engineering productivity, time-to-market, and design risk, helping business stakeholders understand where Agentic AI investments pay off, and where caution is warranted. By bridging technical depth with strategic insight, this TechTalk aims to equip DAC attendees with a realistic framework for evaluating and deploying AI in semiconductor design. This presentation aligns with DAC’s AI, Design, and EDA pillars and is intended for design engineers, CAD managers, and technology decision-makers seeking practical guidance rather than marketing narratives.
