Enables Early Bug Detection During Code Editing For FPGA, ASIC Designers
SAN JOSE, CALIF. –– February 9, 2016 –– OneSpin® Solutions, provider of innovative formal verification solutions, and Sigasi®, provider of hardware description language (HDL) design software, today announced the integration of the OneSpin formal-based design inspection software with Sigasi’s HDL authoring system Sigasi Studio XL.
The solution gives designers a way to run formal-based structural code checks within Sigasi’s environment at the point of edit, spotting issues that otherwise require additional verification effort. The use of formal techniques eliminates much of the false error-reporting characteristic common in rule-based linting tools, accelerating the verification process. Combining...
Close Collaboration Focused Around Specialized Formal IP Practice
SAN JOSE, CALIF. –– November 10, 2015 –– OneSpin Solutions™, provider of innovative formal solutions targeting a broad range of challenging verification problems, announced today that Boost Valley®, a pioneer of intelligent verification intellectual property (IP) and verification services, has joined the Spinnaker Certified Service Partners Program.
The Spinnaker Program, which offers a broad range of service expertise to meet a variety of verification needs, now includes a broader collaboration option known as Intelligent Verification IP (IVIP). Boost Valley as an inaugural member.
As a member of IVIP, Boost Valley has been trained and certified to offer services using either the 360 DV™...
Collaboration with Noted Verification Experts Extends OneSpin’s Reach into Key Market
SAN JOSE, CALIF. –– November 3, 2015 –– OneSpin Solutions™, provider of innovative formal solutions targeting a broad range of challenging verification problems, today named Ulisys Technologies™ as its Israeli distributor.
Ulisys Technologies will market, distribute and support OneSpin’s formal-based solutions on an exclusive basis for the region.
“I am delighted to welcome Ulisys into the OneSpin family,” notes Raik Brinkmann, president and chief executive officer of OneSpin Solutions. “Given the Israeli history of verification innovation and local demand for the OneSpin technology, it is critical that we increase our presence in the region. The knowledge and expertise...
Offers Unique Capabilities for SPICE Model Exploration, Validation and Process Platform Benchmarking
SAN JOSE, CALIF. –– September 15, 2015 –– ProPlus Design Solutions, Inc. today unveiled MEPro™, within its own Nano Design Environment™ (NDE), that bridges circuit design, CAD and process development, and lets designers quickly adopt and make full use of a process platform.
For the first time, MEPro offers a common platform for circuit design, CAD and process development teams, presented in ways each of them are familiar with. They now are able to systematically evaluate any device or circuit target of one or multiple process platforms with SPICE model libraries, avoiding model misuse while leaving increased area for design margins.
Company expands next generation physical verification solutions
August 17, 2015, Santa Clara, California – Sage Design Automation Inc., the company that is redefining physical verification, announced today the appointment of Dr. Raul Camposano as its Chief Executive Officer.
Dr. Camposano has had a distinguished career both in industry and academia. He was CTO, senior vice president and general manager at Synopsys for over 10 years. He also served as CEO of two startups, Xoomsys and Nimbic (acquired by Mentor Graphics). Dr. Camposano is active in the EDA and semiconductor professional community, serving on various boards and technical committees. He is a fellow of the IEEE and holds a Ph.D. in computer science from the University of Karlsruhe.
Grenoble, France and San Jose, CA – May 29, 2015– Docea Power, the provider of virtual prototyping solutions for power and thermal, will reveal at the 52nd Design Automation Conference (DAC) the latest releases of its Aceplorer and Thermal Profiler software tools. Docea Power will demonstrate new advances in power and thermal management modeling and simulation with Aceplorer 4.0 and Thermal Profiler 4.0 new solvers to speed up thermal verification.
Aceplorer 4.0 features a new programming interface, the PTM-API (Power and Thermal Management Application Programming Interface) for modeling complex power and thermal management algorithms (e.g. Android Governors, CPUFreq, CPUIdle). This feature enables to simulate the performance of a chipset given a specific power management...
PrimeRail Dynamic Analysis Deployed in Production Design Flow
MOUNTAIN VIEW, Calif., June 3, 2015–
• Dynamic analysis results correlated to silicon measurements
• Automatic vector generation enabled dynamic voltage drop analysis in the early design phases
• In-Design analysis accelerated creation of robust power network and shortened physical implementation by two weeks
Synopsys, Inc. (Nasdaq:SNPS) today announced that Nationz, a Chinese provider of chips for security processors, smart cards, mobile communications, digital TV, trusted computing and mobile payment solutions, has successfully deployed Synopsys’ PrimeRail tool as the standard power and rail analysis solution for implementation and signoff. The adoption of PrimeRail...
MOUNTAIN VIEW, Calif., June 4, 2015 -- Synopsys, Inc. (Nasdaq: SNPS) will host the Silicon to Software Theater and a number of special events at DAC 2015 that will feature industry experts from innovative companies sharing trends, insights and best practices on key topics in the age of “Smart Everything” including FinFET, IoT, Automotive, Mobile, Networking and Software Security.
WHEN & WHERE:
Sunday, June 7 through Thursday, June 11 at Moscone Center in San Francisco at booth 2133.
The Silicon to Software Theater showcasing key industry trends from Synopsys customers and partners will operate at the Synopsys booth Monday through Wednesday with presentations from 10:30 a.m. to 6:00 p.m.
Join Synopsys Chairman and co-CEO, Aart de Geus, for a fireside...
Daily Presentations from Partners, Formal and Industry Experts in OneSpin’s Theater;
Dr. Raik Brinkmann to Participate in Panel Discussion on IP Verification, Validation
SAN JOSE, CALIF. –– June 4, 2015 –– (reminder June 8)
WHO: OneSpin® Solutions, provider of innovative formal verification solutions targeting a broad range of challenging verification problems
WHAT: Will exhibit at the 52nd Design Automation Conference (DAC) in Booth #3126, showcasing its new OneSpin 360 LaunchPad™, an adaptive formal technology platform, and OneSpin 360 Qualify™, formal fault qualification analysis for safety critical systems. Demonstrations of its entire formal verification product portfolio will be available publicly and in OneSpin’s suites by appointment.