Democratize Chip Design with Deep Learning and Automated Code Transformation
Wednesday, June 25
In the past six decades, electronic design automation (EDA) has done a remarkable job to improve the productivity of hardware designers. I would like to argue that the next phase of EDA is to enable many software programmers to design their own chips or accelerators for a wide range of applications for better performance and energy efficiency, which is much needed as we are approaching the end of Moore’s Law scaling. In this talk, I shall present our effort towards this goal. Coupled with our multi-decade research high-level synthesis (HLS), we developed and integrated multiple deep learning techniques, such as graph neural networks (GNNs) and large language models (LLMs), cross-modality learning, active learning with cross-entropy minimization, hierarchical mixture of expert modeling, and agent-based design space exploration. For regular structures, such as systolic arrays, stencil computation, or even more general affine programs used almost all deep learning kernel, we can also use mathematical programming to achieve automated code transformation. Combining these techniques, we show very promising results of mapping software code to high-quality silicon implementations.
ABOUT: Jason Cong is the Volgenau Chair for Engineering Excellence Professor at the UCLA Computer Science Department (and a former department chair), with joint appointment from the Electrical and Computer Engineering Department. He is the director of Center for Domain-Specific Computing (CDSC) and the director of VLSI Architecture, Synthesis, and Technology (VAST) Laboratory. Dr. Cong’s research interests include novel architectures and compilation for customizable computing, synthesis of VLSI circuits and systems, and quantum computing. He has over 500 publications in these areas, including 19 best paper awards, and 4 papers in the FPGA and Reconfigurable Computing Hall of Fame. He and his former students co-founded AutoESL, which developed the most widely used high-level synthesis tool for FPGAs (renamed to Vivado HLS and Vitis HLS after Xilinx’s acquisition). He is member of the National Academy of Engineering, the American Academy of Arts and Sciences, and a Fellow of ACM, IEEE, and the National Academy of Inventors. He is recipient of the SIA University Research Award, the EDAA Achievement Award, the IEEE Robert N. Noyce Medal for “fundamental contributions to electronic design automation and FPGA design methods”, and the Phil Kaufman Award for “sustained fundamental contributions FPGA design automation technology, from circuit to system levels, with widespread industrial impact