Education Activities & Scholarships @ 58^th DAC

The Design Automation Conference (DAC) is the premier event devoted to the design and design automation of electronic chips and systems. Each year, DAC provides students access to the latest research, opporunities to grow their professional network, and the chance to establish themselves in the EDA community to jumpstart their careers.

Young Fellows Program

PhD Forum & University Demo

DAC System Design Contest

HACK@DAC

 

The Ph.D. Forum at the Design Automation Conference is a poster session hosted by ACM SIGDA for Ph.D. students to present and discuss their dissertation research with people in the EDA community. It has become one of the premier forums for Ph.D. students in design automation to get feedback on their research. It enables the industry and other academicians to see latest top academic work and have access to best graduating students in one place. Participation in the forum is through a scientific evaluation by an expert committee consisting of academia and industry. The forum is open to all members of the design automation community and is free-of-charge. It is virtually co-located with DAC; DAC registration is not required in order to attend this event. 

Register for the PhD Forum

Session I – December 6, 2021 | 10:00 am - 11:00 am PT

1.1	M.SALAH: Mechanism for Simulation-Assisted Layout Partitioning and Analysis of Hotspots	Sherif Mousa
1.2	Fully Automated High Power Amplifier Design: From Transistor Selection to Post-layout Generation	Lida Kouhalvandi
1.3	Designing Data-Aware Network-on-Chip for Performance	Abhijit Das
1.4	Pre and Post Silicon Verification Techniques for Analog and Mixed Signal Circuits	Sayandeep Sanyal
1.5	Ultra-Fast Temperature Estimation Methods for Architecture-Level Thermal Modeling	Hameedah Sultan
1.6	Hardware-Software Co-Design for Emerging Workloads	Diksha Moolchandani
1.7	Leakage Aware Dynamic Thermal Management for 3D Memory Architectures	Lokesh Siddhu
1.8	Architectural-Space Exploration of Energy-Efficient Approximate Arithmetic Units for Error-Tolerant Applications	Haroon Waris
1.9	Novel Attack and Defense Strategies for Enhanced Logic Locking Security	Lilas Alrahis

Session II – December 6, 2021 | 11:00 am - 12:00 pm PT

2.1	Proving Correctness of Industrial Multipliers using Symbolic Computer Algebra	Alireza Mahzoon
2.2	Resilience and Energy-Efficiency for Deep Learning and Spiking Neural Networks for Embedded Systems	Rachmad Vidya Wicaksana Putra
2.3	Robust and Energy-Efficient Deep Learning Systems	Muhammad Abdullah Hanif
2.4	Personalized Deep Learning for Patient-Specific Physiological Monitoring in IoT	Zhenge Jia
2.5	Network-on-Chip Performance Analysis and Optimization for Deep Learning Applications	Sumit Kumar Mandal
2.6	Efficient, Mixed Precision In-Memory Deep learning at the Edge	Shamma Nasrin
2.7	Design of ML-based and Open Source EDA for Power Delivery Network Synthesis and Analysis	Vidya A. Chhabria
2.8	Cross-Layer Techniques for Energy-Efficiency and Resiliency of Advanced Machine Learning Architectures	Alberto Marchisio
2.9	Machine Learning Algorithms in Electronics Design Automation	Zhiyao Xie
2.10	Efficient Stochastic Computing Machine Learning Acceleration at the Edge	Wojciech Romaszkan

Session III – December 6, 2021 | 12:00 pm - 1:00 pm PT

3.1	Designing Obfuscated Systems for Enhanced Hardware-Oriented Security	Michael Zuzak
3.2	Designing Approximate Accelerators, Automatically	Jorge Castro-Godínez
3.3	Breaking the Energy Cage of Insect-scale Autonomous Drones: Interplay of Probabilistic Hardware and Co-designed Algorithms	Priyesh Shukla
3.4	Modeling and Optimization of Next-Generation AI Accelerators under Uncertainties	Sanmitra Banerjee
3.5	Hardware-Software Codesign of Silicon Photonic AI Accelerators	Febin Sunny
3.6	High-performance Spectral Methods for Hypergraphs	Ali Aghdaei
3.7	Low-Power Unary Computing Architecture	Di Wu
3.8	Intrinsic Authentication at IoT Edge Nodes using Spatial and Temporal Signatures	Ahish Shylendra
3.9	Secure and Usable Zero-interaction Pairing and Authentication Methods for the Internet-of-Things	Kyuin Lee
3.10	Energy-Quality Scalable Hardware and Software Solutions for Energy-Efficient Approximate Computing	Setareh Behroozi

• Rasit Topaloglu, IBM (Chair)
• Iris Hui-Ru Jiang, National Taiwan University
• Robert Wille, Johannes Kepler University, Linz
• Jingtong Hu, University of Pittsburgh

• Cristinel Ababei, Marquette University
• Raid Ayoub, Intel
• Ateet Bhalla, Independent Technology Consultant, India
• Rajat Subhra Chakraborty, Associate Professor, Dept. of CSE, IIT Kharagpur
• Xiaoming Chen, Institute of Computing Technology, Chinese Academy of Sciences
• Li Du, University of California, Los Angeles
• Shao-Yun Fang, National Taiwan University of Science and Technology
• Hui-Ru Jiang, National Taiwan University
• Jinwook Jung, IBM
• Ryan Kim, Colorado State University
• Myung-Chul Kim, Google
• Younghyun Kim, University of Wisconsin-Madison
• Bing Li, Technical University of Munich
• Preeti Panda, Indian Institute of Technology Delhi
• Sudeep Pasricha, Colorado State University
• Rahul Rao, IBM
• Emre Salman, Stony Brook University
• Hassan Salmani, Howard University
• Korkut Tokgoz, Tokyo Institute of Technology
• Rasit Onur Topaloglu, IBM
• Miroslav Velev, Aries Design Automation
• Robert Wille, Johannes Kepler University Linz
• Hua Xiang, IBM
• Jiang Xu, Hong Kong Universtiy of Science and Technology
• Cindy Yang Yi, Virginia Tech
• Wei Zhang, The Hong Kong University of Science and Technology

HACK@DAC is a hardware security challenge contest, co-located with the Design and Automation Conference (DAC), for finding and exploiting security-critical vulnerabilities in hardware and firmware. In this competition, participants compete to identify the security vulnerabilities, implement the related exploits, propose mitigation techniques or patches, and report them. The participants are encouraged to use any tools and techniques with a focus on theory, tooling, and automation.

8:00 am - 5:00 pm PT | Sunday, December 5 | Second FLoor Lobby, Moscone West

8:00 am - 5:00 pm PT | Monday, December 6 | Second Floor Lobby, Moscone West

3:30 pm - 5:00 pm PT | Tuesday, December 7 | Designer Track Room; Second Floor Exhibits