SAN FRANCISCO, CA. ––
July, 18, 2024 — The collective success of the electronics industry has been built on a foundation of individual achievements, much of this is recognized at the annual DAC, Chips to Systems Conference, the largest electronic design event focused on research and technology for the design and the design automation of electronic chips to systems. DAC and its sponsors – the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE) – were pleased to honor the five winners of the 2024 Under-40 Innovators Award. The award recognizes the top young innovators who have made a significant impact in the field of design and automation of electronics.
The award winners were recognized at the 61st DAC held June 23 - 27, 2024, at Moscone West in San Francisco. The 2024 Under-40 Innovation honorees are:
Jingtong Hu, Ph.D.
Jingtong Hu is currently an Associate Professor and William Kepler Whiteford Faculty Fellow in the Department of Electrical and Computer Engineering at University of Pittsburgh in Pennsylvania and a consultant for nonprofit organization One Heart Health (1HH). His research interests include embedded systems, on-device AI, digital health, with a focus on achieving independent, personalized and inclusive AI-powered healthcare systems through hardware/software co-design. His works have received three best paper awards, including the Donald O. Pederson Best Paper Award from IEEE Transactions on Computer-Aided Design of Circuits and Systems, Best Paper Award from ASP-DAC and five best paper nominations from DAC, ASP-DAC and ESWEEK. He is also the recipient of Air Force Summer Faculty Fellowship, JSPS Invitational Fellowships for Research, Germany Humboldt Research Fellowship and ACM SIGDA Meritorious Service Award. He has served on the technical program committee of many international conferences such as DAC, DATE, ASP-DAC, ESWEEK, CPS-IoT Week, MLsys and AAAI. He served as a guest editor for Sensors, IEEE Transactions on Computers, ACM Transactions on Cyber-Physical Systems, ACM Transactions on Embedded Systems and is currently serving as an executive committee member and education chair for ACM SIGDA, associate editor for IEEE Embedded Systems Letters, the Journal of Systems Architecture: Embedded Software Design and ACM Transactions on Cyber-Physical Systems. His research has been sponsored by NSF, NIH, ARL, AFRL, NSA/LPS, Meta, Amazon, Microchip, Altera, Singular Medical, among others.
Farimah Farahmandi, PhD
Dr. Farahmandi is Wally Rhines Endowed Professor in Hardware Security and Assistant Professor in the Department of Electrical and Computer Engineering (ECE) and the associate director of the Florida Institute for Cybersecurity (FICS) at the University of Florida. Her research interests include hardware security verification, formal methods and post-silicon validation. Her research has resulted in seven books, nine book chapters and several publications in premier ACM/IEEE journals and conferences. Her research has been recognized by several awards including NSF CAREER Award, the 2022 Semiconductor Research Corporation Young Faculty Award, the 2024 Excellence Award for Assistant Professors in University of Florida, ECE Research Excellence Award, 2023 ECE Service Excellence Award and 2024 Excellence Award in College of Engineering at UF. She is also the recipient of four best paper awards and nominations from IEEE/ACM ASP-DAC and IEEE/ACM DATE. She has se the co-program chair of IEEE HOST 2024 and 2023. Her research has been sponsored by NSF, SRC, DARPA, AFRL, DoD, ONR, Analog Devices, ANSYS, Synopsys and Cisco.
Bita Rouhani, PhD
Bita Rouhani is a Distinguished Engineer at NVIDIA. Her work focuses on delivering generative AI services at low cost by leveraging advanced algorithms, software and hardware. Before joining NVIDIA, Bita was a Partner Group Manager at Microsoft, leading initiatives that achieved orders of magnitude cost savings for AI training and inference, on the scale of hundreds of thousands of accelerators. This involved deploying cutting-edge narrow-precision data types and sparsity in large-scale production. Notable projects she’s worked on include Project Brainwave and the Maia 100 accelerator.
Throughout her career, Bita has influenced the industry by pushing the limits of AI infrastructure through hardware, software and algorithm co-design. She co-founded and led the OCP MX Consortium in collaboration with key industry players, including NVIDIA, Microsoft, AMD, Qualcomm, ARM, Intel and Meta. This consortium, backed by years of her team’s research, has standardized the first set of 4- and 6-bit data types for AI training and inference for nearly all future mainstream AI chips.
Nishant Patil, PhD
Nishant Patil received his B.S. degree in electrical and computer engineering from Carnegie Mellon University and his M.S. and Ph.D. degrees in electrical engineering from Stanford University. Nishant was a Principal Engineer at Google where he focused on the system architecture definition, co-design and performance of Tensor Processing Units (TPUs). For his contributions at Google, Nishant was recognized with multiple Google Cloud organization-wide awards. Nishant has received the ACM SIGDA Outstanding Dissertation Award for his Ph.D. work on imperfection-immune and robust carbon nanotube VLSI technology. Nishant is a Distinguished Engineer at Apple.
Bei Yu, PhD
Bei Yu received Ph.D. degree from the University of Texas at Austin in 2014.
He is an Associate Professor in Computer Science and Engineering at the Chinese University of Hong Kong. He has served as TPC Chair of ACM/IEEE Workshop on Machine Learning for CAD and in many journals’ editorial boards and conference committees. He received ten Best Paper Awards from IEEE TSM 2022, DATE 2022, ICCAD 2021 \& 2023, ASPDAC 2021 & 2022, ICTAI 2019, Integration, the VLSI Journal in 2018, ISPD 2017, SPIE Advanced Lithography Conference 2016 and six ICCAD/ISPD contest awards.
To view all the 61st DAC award winners visit: https://www.dac.com/About/Conference-Archive/61st-DAC/Awards-2024.
The 62nd DAC, Chips to Systems Conference will be held at Moscone West Center in San Francisco, Calif. June 22 – 25, 2025. The 2025 program Call for Papers will be announced October 1, 2024.
About DAC
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 150 of the leading and emerging EDA, silicon, intellectual property (IP), embedded systems and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design Automation (ACM SIGDA).
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For more information, please contact:
Michelle Clancy Fuller, Cayenne Global, LLC
61st DAC Publicity/Marketing Chair
Press@dac.com or call 1-503-702-4732